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1/27 n operating from v cc = 3.0 v to 5.0 v n speaker: mono, thd+n @ 1 khz is 1% max @ 1 w into 8 w btl n headset: stereo, thd+n @ 1 khz is 0.5% max. @ 85 mw into 32 w btl n volume control: 32-step digital volume control n output mode: eight different selections n ultra low pop-and-click n low shutdown current (0.1 a, typ.) n thermal shutdown protection n flip-chip package 18 x 300 m bumps description the ts4855 is a complete low power audio amplifier solution targeted at mobile phones. it integrates, into an extremely compact flip-chip package, an audio amplifier, a speaker driver, and a headset driver. the audio power amplifier can deliver 1.1 w (typ.) of continuous rms output power into an 8 w speaker with a 1% thd+n value. to the headset driver, the amplifier can deliver 85 mw (typ.) per channel of continuous average power into stereo 32 w bridged-tied load with 0.5% thd+n @ 5 v. this device features a 32-step digital volume control and 8 different output selections. the digital volume and output modes are controlled through a three-digit spi interface bus. applications ? mobile phones order code j = flip chip package - only available in tape & reel (jt)) pin connections (top view) part number temperature range package j TS4855IJT -40, +85c pin out (top view) TS4855IJT - flip chip ts4855 loudspeaker & headset driver with volume control february 2003
ts4855 application information for a typical application 2/27 1 application information for a typical application external component descriptions component functional description c in this is the input coupling capacitor. it blocks the dc voltage at, and couples the input signal to the amplifiers input terminals. cin also creates a highpass filter with the internal input impedance zin at fc = 1 / (2 p x zin x cin). c s this is the supply bypass capacitor. it provides power supply filtering. c b this is the bypass pin capacitor. it provides half-supply filtering.
spi bus interface ts4855 3/27 2 spi bus interface 2.1 pin descriptions 2.2 spi operation description the serial data bits are organized into a field containing 8 bits of data as shown in table 1 . the data 0 to data 2 bits determine the output mode of the ts4855 as shown in table 2 . the data 3 to data 7 bits determine the gain level setting as illustrated by table 3 . for each spi transfer, the data bits are written to the data pin with the least significant bit (lsb) first. all serial data are sampled at the rising edge of the clk signal. once all the data bits have been sampled, enb transitions from logic-high to logic low to complete the spi sequence. all 8 bits must be received before any data latch can occur. any excess clk and data transitions will be ignored after the height rising clock edge has occurred. for any data sequence longer than 8 bits, only the first 8 bits will get loaded into the shift register and the rest of the bits will be disregarded. (sd = shut down mode, p hs = non filtered phone in hs, p ihf = external high pass filtered phone in ihf) pin functional description data this is the serial data input pin clk this is the clock input pin enb this is the spi enable pin active at high level table 1: bit allocation data modes lsb data 0 mode 1 data 1 mode 2 data 2 mode 3 data 3 gain 1 data 4 gain 2 data 5 gain 3 data 6 gain 4 msb data 7 gain 5 table 2: output mode selection output mode # data 2 data 1 data 0 spkr out r out l out 0 0 0 0 sd sd sd 10 0 1 +12dbxp ihf sd sd 2 0 1 0 mute g1xp hs g1xp hs 30 1 1 +12dbxp ihf g1xp hs g1xp hs 4 1 0 0 mute g2xr in g2xl in 51 0 1 +12dbxp ihf g2xr in g2xl in 6 1 1 0 mute g1xp hs + g2xr in g1xp hs + g2xl in 71 1 1 +12dbxp ihf g1xp hs + g2xr in g1xp hs + g2xl in
ts4855 spi bus interface 4/27 table 3: gain control settings g2: gain (db) g1: gain (db) data 7 data 6 data 5 data 4 data 3 -34.5 -40.5 0 0 0 0 0 -33.0 -39.0 0 0 0 0 1 -31.5 -37.5 0 0 0 1 0 -30.0 -36.0 0 0 0 1 1 -28.5 -34.5 0 0 1 0 0 -27.0 -33.0 0 0 1 0 1 -25.5 -31.5 0 0 1 1 0 -24.0 -30.0 0 0 1 1 1 -22.5 -28.5 0 1 0 0 0 -21.0 -27.0 0 1 0 0 1 -19.5 -25.5 0 1 0 1 0 -18.0 -24.0 0 1 0 1 1 -16.5 -22.5 0 1 1 0 0 -15.0 -21.0 0 1 1 0 1 -13.5 -19.5 0 1 1 1 0 -12.0 -18.0 0 1 1 1 1 -10.5 -16.5 1 0 0 0 0 -9.0 -15.0 1 0 0 0 1 -7.5 -13.5 1 0 0 1 0 -6.0 -12.0 1 0 0 1 1 -4.5 -10.5 1 0 1 0 0 -3.0 -9.0 1 0 1 0 1 -1.5 -7.5 1 0 1 1 0 0.0 -6.0 1 0 1 1 1 1.5 -4.5 1 1 0 0 0 3.0 -3.0 1 1 0 0 1 4.5 -1.5 1 1 0 1 0 6.0 0.0 1 1 0 1 1 7.5 1.5 1 1 1 0 0 9.0 3.0 1 1 1 0 1 10.5 4.5 1 1 1 1 0 12.0 6.0 1 1 1 1 1
absolute maximum ratings ts4855 5/27 2.3 spi timing diagram 3 absolute maximum ratings 4 operating conditions symbol parameter value unit v cc supply voltage 1 1) all voltage values are measured with respect to the ground pin. 6v t oper operating free air temperature range -40 to + 85 c t stg storage temperature -65 to +150 c t j maximum junction temperature 150 c r thja flip chip thermal resistance junction to ambient 2 2) device is protected in case of over temperature by a thermal shutdown active @ 150c typ. 166 c/w pd power dissipation internally limited esd human body model 3 3) human body model, 100pf discharged through a 1.5 k w resistor into pin of device. 2kv esd machine model 4 4) this is a minimum value. machine model esd, a 200pf cap is charged to the specified voltage, then discharged directly into th e ic with no external series resistor (internal resistor < 5 w ), into pin to pin of device. 5.) all psrr data limits are guaranteed by evaluation tests. 100 v latch-up immunity 200 ma lead temperature (soldering, 10sec) 250 c symbol parameter value unit v cc supply voltage 3 to 5 v v phin maximum phone in input voltage g nd to v cc v v rin/ v lin maximum rin & lin input voltage g nd to v cc v t sd thermal shutdown temperature 150 c
ts4855 electrical characteristics 6/27 5 electrical characteristics table 4: electrical characteristics at vcc = +5.0 v, gnd = 0 v, tamb = 25c (unless otherwise specified) symbol parameter min. typ. max. unit i cc supply current, all gain @ max settings output mode 1, vin = 0 v, no load output mode 1, vin = 0 v, loaded (8 w ) output mode 2,3,4,5,6,7 vin = 0 v, no loads output mode 2,3,4,5,6,7 vin = 0 v, loaded (8 w , 32 w ) 4.0 5.5 8.0 10 8 9 11 12 ma i standby standby current output mode 0 0.1 2 a voo output offset voltage (differential) output mode 1 to 7, vin = 0 v, no load, speaker out output mode 2 to 7 vin = 0 v, no loads, headset out 5 5 20 40 mv vil logic low input voltage 0 0.4 v vih logic high input voltage 1.4 5 v po output power spkr out , rl = 8 w, thd+n = 1%, f = 1 khz r out & l out , rl = 32 w, thd+n = 0.5%, f = 1 khz 800 70 1100 100 mw thd + n total harmonic distortion + noise r out & l out , po = 70 mw, f = 1 khz, rl = 32 w spkr out , po = 800 mw, f = 1 khz, rl = 8 w r out & l out , po=50mw, 20hz electrical characteristics ts4855 7/27 phone in volume btl maximum gain from phone in hs to r out , l out btl minimum gain from phone in hs to r out , l out 5.4 -41.1 6 -40.5 6.6 -39.9 db phone in volume btl maximum gain from rin, lin to r out , l out btl minimum gain from rin, lin to r out , l out 11.4 -35.1 12 -34.5 12.6 -33.9 db phone in volume btl gain from phone in ihf to spkr out 11.4 12 12.6 db zin phone in ihf input impedance 16 20 24 k w zin phone in hs, rin & lin input impedance, all gain setting 42.5 50 57.5 k w tes enable step up time - enb 20 ns teh enable hold time - enb 20 ns tel enable low time - enb 30 ns tds data setup time- data 20 ns tdh data hold time - data 20 ns tcs clock setup time - clk 20 ns tch clock logic high time - clk 50 ns tcl clock logic low time - clk 50 ns fclk clock frequency - clk dc 10 mhz table 5: electrical characteristics at vcc = +3.0 v, gnd = 0 v, tamb = 25c (unless otherwise specified) symbol parameter min. typ. max. unit i cc supply current, all gain @ max settings output mode 1, vin = 0 v, no load output mode 1, vin = 0 v, loaded (8 w ) output mode 2,3,4,5,6,7 vin = 0 v, no loads output mode 2,3,4,5,6,7 vin = 0 v, loaded (8 w , 32 w ) 3.5 4.5 7.5 9 7 8 10 11 ma i standby standby current output mode 0 0.1 2 a voo output offset voltage (differential) output mode 1 to 7, vin = 0 v, no load, speaker out output mode 2 to 7 vin = 0 v, no loads, headset out 5 5 20 40 mv vil logic low input voltage 0 0.4 v vih logic high input voltage 1.4 3 v table 4: electrical characteristics at vcc = +5.0 v, gnd = 0 v, tamb = 25c (unless otherwise specified) symbol parameter min. typ. max. unit
ts4855 electrical characteristics 8/27 po output power spkr out , rl = 8 w, thd = 1%, f = 1 khz r out & l out , rl = 32 w, thd = 0.5%, f = 1 khz 300 20 340 25 mw thd + n total harmonic distortion + noise r out & l out , po=20mw, f=1khz, rl=32 w spkr out , po = 300 mw, f = 1 khz, rl = 8 w r out & l out , po=15mw, 20hz electrical characteristics ts4855 9/27 index of graphics note: in the graphs that follow, the abbreviations spkout = speaker output, and hdout = headphone output are used. tds data setup time- data 20 ns tdh data hold time - data 20 ns tcs clock setup time - clk 20 ns tch clock logic high time - clk 50 ns tcl clock logic low time - clk 50 ns fclk clock frequency - clk dc 10 mhz table 5: electrical characteristics at vcc = +3.0 v, gnd = 0 v, tamb = 25c (unless otherwise specified) symbol parameter min. typ. max. unit description figure page thd + n vs. output power figures 1 to 11 page 10 to page 11 thd + n vs. frequency figures 12 to 18 page 11 to page 12 output power vs. power supply voltage figures 19 to 22 page 13 output power vs. load resistor figures 23 to 26 page 13 to page 14 psrr vs. frequency figures 27 to 34 page 14 to page 15 mute attenuation vs. frequency figure 35 page 15 frequency response figures 36 to 38 page 15 to page 16 -3 db lower cut off frequency vs. input capacitor figures 39 to 40 page 16 -3 db lower cut off frequency vs. gain setting figure 39 page 16 power derating curves figure 42 page 16 signal to noise ratio vs. power supply voltage figures 43 to 50 page 17 to page 18 current consumption vs. power supply voltage figure 51 page 18 power dissipation vs. output power figures 52 to 55 page 18 to page 19
ts4855 electrical characteristics 10/27 figure 1: spkout thd+n vs. output power (output modes 1, 3, 5, 7) figure 2: spkout thd+n vs. output power (output modes 1, 3, 5, 7) figure 3: spkout thd+n vs. output power (output modes 1, 3, 5, 7) figure 4: hdout thd+n vs. output power (output modes 2, 3 g=+6db) figure 5: hdout thd+n vs. output power (output modes 2, 3 g=+3db) figure 6: hdout thd+n vs. output power (output modes 2, 3 g=+6db) 1e-3 0.01 0.1 1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 4 w bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 1 0.01 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 8 w bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 1 0.01 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 16 w bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 16 w bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 16 w bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 32 w bw < 125khz tamb = 25 c thd + n (%) output power (w)
electrical characteristics ts4855 11/27 figure 7: hdout thd+n vs. output power (output modes 2, 3 g=+3db) figure 8: hdout thd+n vs. output power (output modes 4, 5 g=+12db) figure 9: hdout thd+n vs. output power (output modes 4, 5 g=+6db) figure 10: hdout thd+n vs. output power (output modes 4, 5 g=+12db) figure 11: hdout thd+n vs. output power (output modes 4, 5 g=+6db) figure 12: hdout thd+n vs. frequency (output modes 1, 3, 5, 7) 1e-3 0.01 0.1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 32 w bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.01 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 16 w bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.01 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 16 w bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 32 w bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 32 w bw < 125khz tamb = 25 c thd + n (%) output power (w) 100 1000 10000 0.1 1 10 vcc=3v p=450mw vcc=5v p=1w rl = 4 w bw < 125khz tamb = 25 c thd + n (%) frequency (hz)
ts4855 electrical characteristics 12/27 figure 13: spkout thd+n vs. frequency (output modes 1, 3, 5, 7) figure 14: spout thd+n vs. frequency (output modes 1, 3, 5, 7) figure 15: hdout thd+n vs. frequency (output modes 2, 3 g=+6db) figure 16: hdout thd+n vs. frequency (output modes 2, 3 g=+6db) figure 17: hdout thd+n vs. frequency (output modes 4, 5 g=+12db) figure 18: hdout thd+n vs. frequency (output modes 4, 5 g=+12db) 100 1000 10000 0.1 1 10 vcc=3v p=250mw vcc=5v p=800mw rl = 8 w bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.01 0.1 1 10 vcc=3v p=180mw vcc=5v p=500mw rl = 16 w bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.1 1 10 vcc=3v, p=50mw vcc=5v, p=150mw rl = 16 w g=+6db bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.1 1 10 vcc=3v, p=25mw vcc=5v, p=75mw rl = 32 w g=+6db bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.1 1 10 vcc=3v p=50mw vcc=5v p=150mw rl = 16 w g=+12db bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.1 1 10 vcc=3v p=25mw vcc=5v p=75mw rl = 32 w g=+12db bw < 125khz tamb = 25 c thd + n (%) frequency (hz)
electrical characteristics ts4855 13/27 figure 19: speaker output power vs. power supply voltage (output modes 1, 3, 5, 7) figure 20: speaker output power vs. power supply voltage (output modes 1, 3, 5, 7) figure 21: headphone output power vs. power supply voltage (output modes 2, 3, 4, 5, 6, 7) figure 22: headphone output power vs. power supply voltage (output modes 2, 3, 4, 5, 6, 7) figure 23: speaker output power vs. load resistance (output modes 1, 3, 5, 7) figure 24: speaker output power vs. load resistance (output modes 1, 3, 5, 7) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 f = 1khz bw < 125khz tamb = 25 c 16 w 4 w 8 w output power at 1% thd + n (w) vcc (v) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 f = 1khz bw < 125khz tamb = 25 c 16 w 4 w 8 w output power at 10% thd + n (w) vcc (v) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 50 100 150 200 250 300 350 f = 1khz bw < 125khz tamb = 25 c 16 w 32 w output power at 1% thd + n (w) vcc (v) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 50 100 150 200 250 300 350 400 450 f = 1khz bw < 125khz tamb = 25 c 16 w 32 w output power at 10% thd + n (w) vcc (v) 4 6 8 10 12 14 16 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 thd+n=10% vcc = 5v f = 1khz bw < 125khz tamb = 25 c thd+n=1% output power (w) load resistance (ohm) 4 6 8 10 12 14 16 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 thd+n=10% vcc = 3v f = 1khz bw < 125khz tamb = 25 c thd+n=1% output power (w) load resistance (ohm)
ts4855 electrical characteristics 14/27 figure 25: headphone output power vs. load resistance (output modes 2, 3, 4, 5, 6, 7) figure 26: headphone output power vs. load resistance (output modes 2, 3, 4, 5, 6, 7) figure 27: spkout psrr vs. frequency (output modes 1, 3, 5, 7 input grounded) figure 28: spkout psrr vs. frequency (output modes 2, 4, 6 input grounded) figure 29: hdout psrr vs. frequency (output modes 2, 3 input grounded) figure 30: hdout psrr vs. frequency (output modes 2, 3 input grounded) 16 20 24 28 32 36 40 44 48 0 50 100 150 200 250 300 350 thd+n=10% vcc = 5v f = 1khz bw < 125khz tamb = 25 c thd+n=1% output power (mw) load resistance (ohm) 16 20 24 28 32 36 40 44 48 0 20 40 60 80 100 thd+n=10% vcc = 3v f = 1khz bw < 125khz tamb = 25 c thd+n=1% output power (mw) load resistance (ohm) 100 1000 10000 100000 -70 -60 -50 -40 -30 -20 -10 0 vcc=3v & 5v ouput mode 1, 3, 5, 7 rl = 8 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -80 -70 -60 -50 -40 -30 -20 -10 0 vcc=3v & 5v ouput mode 2, 4, 6 rl = 8 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -60 -50 -40 -30 -20 -10 g=0db g=+3db g=-40.5db g=-18db g=-6db g=+6db output mode 2, 3 vcc=+5v rl = 32 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -60 -50 -40 -30 -20 -10 g=0db g=+3db g=-40.5db g=-18db g=-6db g=+6db output mode 2, 3 vcc=+3v rl = 32 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz)
electrical characteristics ts4855 15/27 figure 31: hdout psrr vs. frequency (output modes 4, 5 inputs grounded) figure 32: hdout psrr vs. frequency (output modes 4, 5 inputs grounded) figure 33: hdout psrr vs. frequency (output modes 6, 7 inputs grounded) figure 34: hdout psrr vs. frequency (output modes 6, 7 inputs grounded) figure 35: spkout mute attenuation vs. frequency (output modes 2, 4, 6) figure 36: spkout frequency response (output modes 1, 3, 5, 7) 100 1000 10000 100000 -60 -50 -40 -30 -20 -10 0 g=+6db g=+9db g=-34.5db g=-12db g=0db g=+12db output mode 4, 5 vcc=+5v rl = 32 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -50 -40 -30 -20 -10 0 g=+6db g=+9db g=-34.5db g=-12db g=0db g=+12db output mode 4, 5 vcc=+3v rl = 32 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -50 -40 -30 -20 -10 0 g1=+3db g2=+6db g1=+3db g2=+9db g1=-40.5db g2=-34.5db g1=-18db g2=-12db g1=-6db g2=0db g1=+6db g2=+12db output mode 6, 7 vcc=+5v rl = 32 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -50 -40 -30 -20 -10 0 g1=+3db g2=+6db g1=+3db g2=+9db g1=-40.5db g2=-34.5db g1=-18db g2=-12db g1=-6db g2=0db g1=+6db g2=+12db output mode 6, 7 vcc=+3v rl = 32 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 vcc=3v vcc=5v ouput mode 2, 4, 6 rl = 8 w vinpihf=1vrms bw < 125khz tamb = 25 c mute attenuation (db) frequency (hz) 20 100 1000 10000 0 2 4 6 8 10 12 vcc=3v vcc=5v ouput mode 1, 3, 5, 7 rl = 8 w cin=220nf vinpihf=0.2vrms bw < 125khz tamb = 25 c output level (db) frequency (hz)
ts4855 electrical characteristics 16/27 figure 37: hdout frequency response (output modes 2, 3 g=+6db) figure 38: hdout frequency response (output modes 4, 5 g=+12db) figure 39: spkout -3db lower cut off freq. vs. input capacitor (output modes 1, 3, 5, 7) figure 40: hdout -3db lower cut-off frequency vs. input capacitor (output modes 2, 3, 4, 5, 6, 7) figure 41: hdout -3db lower cut-off freq. vs. gain setting (output modes 2, 3, 4, 5, 6, 7) figure 42: power derating curves 20 100 1000 10000 0 1 2 3 4 5 6 vcc=5v vcc=3v ouput mode 2, 3 rl = 32 w cin=220nf vinphs=0.2vrms g=+6db bw < 125khz tamb = 25 c output level (db) frequency (hz) 20 100 1000 10000 0 2 4 6 8 10 12 vcc=5v vcc=3v ouput mode 4, 5 rl = 32 w cin=220nf vinr/l=0.2vrms g=+12db bw < 125khz tamb = 25 c output level (db) frequency (hz) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 20 40 60 80 100 minimum input impedance maximum input impedance typical input impedance phone in ihf input tamb=25 c lower -3db cut off frequency (hz) input capacitor ( f) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 10 20 30 40 minimum input impedance maximum input impedance typical input impedance phone in hs input rin & lin inputs all gain setting tamb=25 c lower -3db cut off frequency (hz) input capacitor ( f) -20 0 1 10 100 cin=1 m f cin=470nf cin=220nf cin=100nf phone in hs / rin & lin inputs tamb=25 c 6 -6 -36 -40.5 12 -34.5 lower -3db cut off frequency (hz) gain setting (db) 0 25 50 75 100 125 150 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 no heat sink heat sink surface = 125mm 2 flip-chip package power dissipation (w) ambiant temperature ( c)
electrical characteristics ts4855 17/27 figure 43: spkout snr vs. power supply voltage, unweighted filter, bw = 20 hz to 20 khz figure 44: spkout snr vs. power supply voltage, weighted filter a, bw = 20 hz to 20 khz figure 45: hdout snr vs. power supply voltage, unweighted filter, bw= 20 hz to 20 khz figure 46: hdout snr vs. power supply voltage, weighted filter a, bw=20hz to 20khz figure 47: hdout snr vs. power supply voltage, unweighted filter, bw=20hz to 20khz figure 48: hdout snr vs. power supply voltage, weighted filter a, bw = 20 hz to 20 khz 1234567 90 92 94 96 98 100 102 104 106 108 110 vcc = 3v vcc = 5v rl=8 w unweighted filter (20hz to 20khz) thd + n < 0.7% tamb = 25 c snr (db) output mode 1234567 96 98 100 102 104 106 108 110 vcc = 3v vcc = 5v rl=8 w weighted filter a (20hz to 20khz) thd + n < 0.7% tamb = 25 c snr (db) output mode 1234567 80 82 84 86 88 90 92 94 96 98 100 vcc = 3v vcc = 5v rl = 32 w g=+6db unweighted filter (20hz to 20khz) thd + n < 0.7% tamb = 25 c snr (db) output mode 1234567 80 82 84 86 88 90 92 94 96 98 100 vcc = 3v vcc = 5v rl = 32 w g=+6db weighted filter a (20hz to 20khz) thd + n < 0.7% tamb = 25 c snr (db) output mode 1234567 80 82 84 86 88 90 92 94 96 98 100 vcc = 3v vcc = 5v rl = 32 w g=+12db unweighted filter (20hz to 20khz) thd + n < 0.7% tamb = 25 c snr (db) output mode 1234567 80 82 84 86 88 90 92 94 96 98 100 vcc = 3v vcc = 5v rl = 32 w g=+12db weighted filter a (20hz to 20khz) thd + n < 0.7% tamb = 25 c snr (db) output mode
ts4855 electrical characteristics 18/27 figure 49: hdout snr vs. power supply voltage, unweighted filter, bw = 20 hz to 20 khz) figure 50: hdout snr vs. power supply voltage, weighted filter a, bw = 20 hz to 20 khz) figure 51: current consumption vs. power supply voltage figure 52: power dissipation vs. output power: speaker output figure 53: power dissipation vs. output power: speaker output figure 54: power dissipation vs. output power. headphone output one channel 1234567 80 82 84 86 88 90 92 94 96 98 100 vcc = 3v vcc = 5v rl = 32 w g=+6db and +12db unweighted filter (20hz to 20khz) thd + n < 0.7% tamb = 25 c snr (db) output mode 1234567 80 82 84 86 88 90 92 94 96 98 100 vcc = 3v vcc = 5v rl = 32 w g=+6db and +12db weighted filter a (20hz to 20khz) thd + n < 0.7% tamb = 25 c snr (db) output mode 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 1 2 3 4 5 6 7 8 9 10 output mode 2 to 7 rl=8 w and 2x32 w output mode 2 to 7 no loads output mode 1 rl=8 w tamb = 25 c output mode 1 no load icc (ma) vcc (v) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 rl=16 w rl=8 w vcc=5v f=1khz thd+n<1% rl=4 w power dissipation (w) output power (w) 0.0 0.1 0.2 0.3 0.4 0.5 0.0 0.1 0.2 0.3 0.4 0.5 rl=4 w rl=8 w vcc=3v f=1khz thd+n<1% rl=16 w power dissipation (w) output power (w) 0.00 0.05 0.10 0.15 0.20 0.25 0.0 0.1 0.2 0.3 0.4 rl=16 w rl=32 w vcc=5v f=1khz thd+n<1% power dissipation (w) output power (w)
electrical characteristics ts4855 19/27 figure 55: power dissipation vs. output power. headphone output one channel 0 10203040506070 0 20 40 60 80 100 120 rl=32 w vcc=3v f=1khz thd+n<1% rl=16 w power dissipation (mw) output power (mw)
ts4855 application information 20/27 6 application information 6.1 btl configuration principle the ts4855 integrates 3 monolithic power amplifiers having btl output. btl (bridge tied load) means that each end of the load is connected to two single-ended output amplifiers. thus, we have: single ended output 1 = vout1 = vout (v) single ended output 2 = vout2 = -vout (v) and vout1 - vout2 = 2vout (v) the output power is: for the same power supply voltage, the output power in btl configuration is 4 times higher than the output power in single-ended configuration. 6.2 power dissipation and efficiency hypotheses: ? voltage and current in the load are sinusoidal (vout and iout). ? supply voltage is a pure dc source (vcc). regarding the load we have: and and therefore, the average current delivered by the supply voltage is: the power delivered by the supply voltage is: psupply = vcc icc av g (w) then, the power dissipated by each amplifier is pdiss = psupply - pout (w) and the maximum value is obtained when: and its value is: note: this maximum value is only depending on power supply voltage and load values. the efficiency is the ratio between the output power and the power supply the maximum theoretical value is reached when vpeak = vcc, so the ts4855 has 3 independent power amplifiers and each amplifier produces heat due to its power dissipation. therefore, the maximum die temperature is the sum of the each amplifiers maximum power dissipation. it is calculated as follows: p diss speaker = power dissipation due to the speaker power amplifier. p diss head = power dissipation due to each headphones power amplifier. total p diss =p diss speaker +p diss head1 +p diss head2 (w) in most cases, p diss head1 = p diss head 2 , giving: to t a l p diss = p diss speaker +2p diss head (w) ) w ( r ) vout 2 ( pout l 2 rms = v out = v peak sin w t (v) i out = v out r l ---------------- - (a) p out = v peak 2 2r l ---------------------- ( w ) i cc avg = 2 v peak p r l ------------------- - (a) ) w ( p p r v 2 2 p out out l cc diss - p = ? pdiss ? p out --------------------- - = 0 ) w ( r vcc 2 max pdiss l 2 2 p = h = p out psupply ----------------------- - = p v peak 4v cc ----------------------- p 4 ---- - = 78.5% [] ) w ( p 2 p r p 2 r p v 2 2 totalp head out speaker out head l head out speaker l speaker out cc diss + - ? ? + p =
application information ts4855 21/27 the following graph shows an example of the previous formula, with vcc set to +5 v, r load speaker set to 8 w, and r load headphone se to 16 w . figure 56: example of total power dissipation vs. speaker and headphone output power 6.3 low frequency response in low frequency region, the effect of cin starts. cin with zin forms a high pass filter with a -3 db cut off frequency. zin is the input impedance of the corresponding input: ?20k w for phone in ihf input ?50k w for the 3 other inputs note: for all inputs, the impedance value remains constant for all gain settings. this means that the lower cut-off frequency doesnt change with gain setting. note also that 20 k w and 50 k w are typical values and there are tolerances around these values (see electrical characteristics on page 6). in figures 39 to 41 , you could easily establish the cin value for a -3 db cut-off frequency required. 6.4 decoupling of the circuit two capacitors are needed to bypass properly the ts4855, a power supply bypass capacitor cs and a bias voltage bypass capacitor cb. cs has especially an influence on the thd+n in high frequency (above 7 khz) and indirectly on the power supply disturbances. with 1 f, you could expect similar thd+n performances like shown in the datasheet. if cs is lower than 1 f, thd+n increases in high frequency and disturbances on the power supply rail are less filtered. to the contrary, if cs is higher than 1 f, those disturbances on the power supply rail are more filtered. cb has an influence on thd+n in lower frequency, but its value is critical on the final result of psrr with input grounded in lower frequency: ? if cb is lower than 1 f, thd+n increases at lower frequencies and the psrr worsens upwards. ? if cb is higher than 1 f, the benefit on thd+n and psrr in the lower frequency range is small. 6.5 startup time when the ts4855 is controlled to switch from the full standby mode (output mode 0) to another output mode, a delay is necessary to stabilize the dc bias. this delay depends on the cb value and can be calculated by the following formulas. typical startup time = 0.0175 x cb (s) max. startup time = 0.025 x cb (s) (cb is in f in these formulas) these formulas assume that the cb voltage is equal to 0 v. if the cb voltage is not equal to 0v, the startup time will be always lower. the startup time is the delay between the negative edge of enable input (see spi operation description on page 3) and the power on of the output amplifiers. note: when the ts4855 is set in full standby mode, cb is discharged through an internal resistor. the time to reach 0 v of cb voltage could be calculated by the following formula: tdischarge = 3 x cb (s) note: cb must be in f in this formula. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.2 1.0 0.8 0.6 0.4 0.2 0.0 total power dissipation (w) vcc=5v thd+n<1% tamb=25 c headphone output power (mw) 250 200 150 100 50 0 speaker ouput power (w) ) hz ( cin zin 2 1 f cl p =
ts4855 application information 22/27 6.6 pop and click performance the ts4855 has internal pop and click reduction circuitry. the performance of this circuitry is closely linked with the value of the input capacitor cin and the bias voltage bypass capacitor cb. the value of cin is due to the lower cut-off frequency value requested. the value of cb is due to thd+n and psrr requested always in lower frequency. the ts4855 is optimized to have a low pop and click in the typical schematic configuration (see page 2 ). note: the value of cs is not an important consideration as regards pop and click. 6.7 notes on psrr measurement what is the psrr? the psrr is the power supply rejection ratio. the psrr of a device, is the ratio between a power supply disturbance and the result on the output. we can say that the psrr is the ability of a device to minimize the impact of power supply disturbances to the output. how we measure the psrr? the pssr was measured according to the schematic shown in figure 57 . figure 57: psrr measurement schematic principles of operation ? the dc voltage supply (vcc) is fixed. ? the ac sinusoidal ripple voltage (vripple) is fixed. ? no bypass capacitor cs is used. the psrr value for each frequency is: note: the measure of the rms voltage is not an rms selective measure but a full range (20 hz to 125 khz) rms measure. this means that the effective rms signal + the noise is measured. as the measurement is performed with a wide- band frequency range apparatus, we have to subtract the noise part (quadratic operation) of the measurement to obtain the real rms signal needed to calculate the psrr, as shown in the formula above. ) db ( rms rms log 20 psrr ) vripple ( ) output ( ? ? =
application information ts4855 23/27 figure 58: ts4855 footprint recommendation
ts4855 package information 24/27 7 package information flip-chip package18 bumps: TS4855IJT marking (on top view) package mechanical data n st logo n part number: a55 n three digit datecode: yww n the dot is for marking the bump1a q die size: 2440m x 2170m 30m q die height (including bumps): 600m 30m q bumps diameter: 300m 15m q bumps height: 250m 15m q pitch: 500m 10m 866 m 866 m 500 m 750 m 2440 m 2170 m 600 m 866 m 866 m 500 m 750 m 2440 m 2170 m 600 m
package information ts4855 25/27 pin out (top view) r out- gnd r out + l out - l out + r in vdd data l in vdd phone in ihf enb phone in hs spkr out - spkr out + clk gnd bypass 1 5 4 3 2 7 6 ae d c b r out- gnd r out + l out - l out + r in vdd data l in vdd phone in ihf enb phone in hs spkr out - spkr out + clk gnd bypass r out- gnd r out + l out - l out + r in vdd data l in vdd phone in ihf enb phone in hs spkr out - spkr out + clk gnd bypass r out- gnd r out + l out - l out + r in vdd data l in vdd phone in ihf enb phone in hs spkr out - spkr out + clk gnd bypass 1 5 4 3 2 7 6 ae d c b
ts4855 package information 26/27 daisy chain mechanical data all drawings dimensions are in millimeters remarks daisy chain sample is featuring pin connection two by two. the schematic above is illustrating the way connecting pins each others. this sample is used for testing continuity on board. pcb needs to be designed on the opposite way, where pin connections are not done on daisy chain samples. by that way, just connecting a ohmmeter between pin 1a and pin 5a, the soldering process continuity can be tested. order code r out- gnd r out + l out - l out + r in vdd data l in vdd phone in ihf enb phone in hs spkr out - spkr out + clk gnd bypass 2.44 mm 2.17 mm ae d c b 1 5 4 3 2 7 6 r out- gnd r out + l out - l out + r in vdd data l in vdd phone in ihf enb phone in hs spkr out - spkr out + clk gnd bypass 2.44 mm 2.17 mm r out- gnd r out + l out - l out + r in vdd data l in vdd phone in ihf enb phone in hs spkr out - spkr out + clk gnd bypass r out- gnd r out + l out - l out + r in vdd data l in vdd phone in ihf enb phone in hs spkr out - spkr out + clk gnd bypass r out- gnd r out + l out - l out + r in vdd data l in vdd phone in ihf enb phone in hs spkr out - spkr out + clk gnd bypass 2.44 mm 2.17 mm ae d c b 1 5 4 3 2 7 6 ae d c b 1 5 4 3 2 7 6 part number temperature range package marking j tsdc02ijt -40, +85c dc2
tape & reel specification ts4855 27/27 8 tape & reel specification figure 59: top view of tape & reel device orientation the devices are oriented in the carrier pocket with bump number a1 adjacent to the sprocket holes. a 1 a 1 user direction of feed a 1 a 1 user direction of feed information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics ? 2003 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco singapore - spain - sweden - switzerland - united kingdom http://www.st.com

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